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Fixed csn pin.

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Marvin Blum
2017-04-17 21:20:48 +02:00
parent 55a584bffb
commit af06ef166f
4 changed files with 68 additions and 54 deletions
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1
compile
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@@ -7,7 +7,6 @@ avr-gcc -Os -DF_CPU=16000000UL -mmcu=atmega328p -c -o build/rf24.o -Wall rf24/rf
avr-gcc -Os -DF_CPU=16000000UL -mmcu=atmega328p -c -o build/util.o -Wall ard/util.c avr-gcc -Os -DF_CPU=16000000UL -mmcu=atmega328p -c -o build/util.o -Wall ard/util.c
avr-gcc -Os -DF_CPU=16000000UL -mmcu=atmega328p -c -o build/serial.o -Wall ard/serial.c avr-gcc -Os -DF_CPU=16000000UL -mmcu=atmega328p -c -o build/serial.o -Wall ard/serial.c
avr-gcc -Os -DF_CPU=16000000UL -mmcu=atmega328p -c -o build/pins.o -Wall ard/pins.c avr-gcc -Os -DF_CPU=16000000UL -mmcu=atmega328p -c -o build/pins.o -Wall ard/pins.c
avr-gcc -Os -DF_CPU=16000000UL -mmcu=atmega328p -c -o build/rf24.o -Wall rf24/rf24.c
avr-gcc -Os -DF_CPU=16000000UL -mmcu=atmega328p -c -o build/main.o -Wall main.c avr-gcc -Os -DF_CPU=16000000UL -mmcu=atmega328p -c -o build/main.o -Wall main.c
avr-gcc -mmcu=atmega328p build/*.o -o build/main avr-gcc -mmcu=atmega328p build/*.o -o build/main

15
main.c
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@@ -6,7 +6,7 @@
#include "rf24/rf24.h" #include "rf24/rf24.h"
#include "rf24/nRF24L01.h" #include "rf24/nRF24L01.h"
//#define TX 1 #define TX
unsigned char rx_addr[5] = {0xE7, 0xE7, 0xE7, 0xE7, 0xE7}; unsigned char rx_addr[5] = {0xE7, 0xE7, 0xE7, 0xE7, 0xE7};
unsigned char tx_addr[5] = {0xD7, 0xD7, 0xD7, 0xD7, 0xD7}; unsigned char tx_addr[5] = {0xD7, 0xD7, 0xD7, 0xD7, 0xD7};
@@ -26,8 +26,8 @@ void prepare(){
pins_init(); pins_init();
serial_init(9600); serial_init(9600);
pin_mode(A1, OUTPUT); // ok pin_mode(A1, OUTPUT); // green
pin_mode(A2, OUTPUT); // error pin_mode(A2, OUTPUT); // red
rf24_init(7, 6, 5, 4, 3, 2); rf24_init(7, 6, 5, 4, 3, 2);
rf24_config(2, 4); rf24_config(2, 4);
@@ -39,21 +39,22 @@ void prepare(){
rf24_rx_addr(tx_addr); rf24_rx_addr(tx_addr);
rf24_tx_addr(rx_addr); rf24_tx_addr(rx_addr);
#endif #endif
_delay_ms(1000);
} }
void loop(){ void loop(){
digital_write(A2, LOW);
_delay_ms(1000); _delay_ms(1000);
digital_write(A1, LOW); digital_write(A1, LOW);
digital_write(A2, LOW); digital_write(A2, HIGH);
_delay_ms(1000); _delay_ms(1000);
#ifdef TX #ifdef TX
unsigned char data[4] = {1, 2, 3, 4}; unsigned char data[4] = {1, 2, 3, 4};
rf24_send(data); rf24_send(data);
while(rf24_is_sending()); while(rf24_is_sending()){
_delay_ms(20);
}
/*unsigned char status = rf24_status(); /*unsigned char status = rf24_status();
if(status&(1<<TX_DS)){ if(status&(1<<TX_DS)){

61
rf24/nRF24L01.h
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@@ -33,8 +33,7 @@
#define ARD 4 // 4 bits #define ARD 4 // 4 bits
#define ARC 0 // 4 bits #define ARC 0 // 4 bits
#define RF_CH_REG 0x05 #define RF_CH 0x05
#define RF_CH 0 // 7 bits
#define RF_CH_MASK 0x7F #define RF_CH_MASK 0x7F
#define RF_SETUP 0x06 #define RF_SETUP 0x06
@@ -67,18 +66,12 @@
#define TX_ADDR 0x10 // 5 bytes #define TX_ADDR 0x10 // 5 bytes
#define RX_PW_P0_REG 0x11 #define RX_PW_P0 0x11 // 6 bits
#define RX_PW_P0 0 // 6 bits #define RX_PW_P1 0x12 // 6 bits
#define RX_PW_P1_REG 0x12 #define RX_PW_P2 0x13 // 6 bits
#define RX_PW_P1 0 // 6 bits #define RX_PW_P3 0x14 // 6 bits
#define RX_PW_P2_REG 0x13 #define RX_PW_P4 0x15 // 6 bits
#define RX_PW_P2 0 // 6 bits #define RX_PW_P5 0x16 // 6 bits
#define RX_PW_P3_REG 0x14
#define RX_PW_P3 0 // 6 bits
#define RX_PW_P4_REG 0x15
#define RX_PW_P4 0 // 6 bits
#define RX_PW_P5_REG 0x16
#define RX_PW_P5 0 // 6 bits
#define RX_PW_MASK 0x3F #define RX_PW_MASK 0x3F
#define FIFO_STATUS 0x17 #define FIFO_STATUS 0x17
@@ -101,26 +94,24 @@
#define EN_ACK_PAY 1 #define EN_ACK_PAY 1
#define EN_DYN_ACK 0 #define EN_DYN_ACK 0
#define R_REGISTER 0x00 #define R_REGISTER 0x00
#define W_REGISTER 0x20 #define W_REGISTER 0x20
#define REG_MASK 0x1F #define REG_MASK 0x1F
#define R_RX_PAYLOAD 0x61 #define R_RX_PAYLOAD 0x61
#define W_TX_PAYLOAD 0xA0 #define W_TX_PAYLOAD 0xA0
#define FLUSH_TX 0xE1 #define FLUSH_TX 0xE1
#define FLUSH_RX 0xE2 #define FLUSH_RX 0xE2
#define REUSE_TX_PL 0xE3 #define REUSE_TX_PL 0xE3
#define R_RX_PL_WID 0x60 #define R_RX_PL_WID 0x60
#define W_ACK_PAYLOAD 0xA8 #define W_ACK_PAYLOAD 0xA8
#define W_ACK_PAYLOAD_MASK 0x07 #define W_ACK_PAYLOAD_MASK 0x07
#define PIPE_0 0x00 #define PIPE_0 0x00
#define PIPE_1 0x01 #define PIPE_1 0x01
#define PIPE_2 0x02 #define PIPE_2 0x02
#define PIPE_3 0x03 #define PIPE_3 0x03
#define PIPE_4 0x04 #define PIPE_4 0x04
#define PIPE_5 0x05 #define PIPE_5 0x05
#define W_TX_PAYLOAD_NOACK 0xB0 #define W_TX_PAYLOAD_NOACK 0xB0
#define NOP 0xFF #define NOP 0xFF
// TODO
#endif #endif

45
rf24/rf24.c
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@@ -68,29 +68,36 @@ void rf24_config(unsigned char channel, unsigned char payload_len){
} }
void rf24_rx_addr(unsigned char* addr){ void rf24_rx_addr(unsigned char* addr){
digital_write(_csn, LOW);
rf24_serial_write(W_REGISTER|RX_ADDR_P1); // data pipe rf24_serial_write(W_REGISTER|RX_ADDR_P1); // data pipe
rf24_serial_transmit(addr, 5); rf24_serial_transmit(addr, 5);
digital_write(_csn, HIGH);
} }
void rf24_tx_addr(unsigned char* addr){ void rf24_tx_addr(unsigned char* addr){
digital_write(_csn, LOW);
rf24_serial_write(W_REGISTER|RX_ADDR_P0); // auto ACK pipe address must match... rf24_serial_write(W_REGISTER|RX_ADDR_P0); // auto ACK pipe address must match...
rf24_serial_transmit(addr, 5); rf24_serial_transmit(addr, 5);
rf24_serial_write(W_REGISTER|TX_ADDR); // tx address rf24_serial_write(W_REGISTER|TX_ADDR); // tx address
rf24_serial_transmit(addr, 5); rf24_serial_transmit(addr, 5);
digital_write(_csn, HIGH);
} }
void rf24_rx(){ void rf24_rx(){
digital_write(_csn, LOW);
rf24_serial_write(FLUSH_RX); rf24_serial_write(FLUSH_RX);
digital_write(_csn, HIGH);
digital_write(_ce, LOW);
rf24_config_register(STATUS, (1<<RX_DR)|(1<<TX_DS)|(1<<MAX_RT)); rf24_config_register(STATUS, (1<<RX_DR)|(1<<TX_DS)|(1<<MAX_RT));
rf24_config_register(CONFIG, CONFIG_CRC|(1<<PWR_UP)|(1<<PRIM_RX)); rf24_config_register(CONFIG, CONFIG_CRC|(1<<PWR_UP)|(1<<PRIM_RX));
digital_write(_ce, HIGH); digital_write(_ce, HIGH);
} }
void rf24_tx(){ void rf24_tx(){
rf24_serial_write(FLUSH_TX); digital_write(_ce, LOW);
rf24_config_register(STATUS, (1<<RX_DR)|(1<<TX_DS)|(1<<MAX_RT)); rf24_config_register(STATUS, (1<<RX_DR)|(1<<TX_DS)|(1<<MAX_RT));
rf24_config_register(CONFIG, CONFIG_CRC|(1<<PWR_UP)|(0<<PRIM_RX)); rf24_config_register(CONFIG, CONFIG_CRC|(1<<PWR_UP)|(0<<PRIM_RX));
digital_write(_ce, LOW);
} }
void rf24_power_down(){ void rf24_power_down(){
@@ -100,8 +107,11 @@ void rf24_power_down(){
void rf24_send(unsigned char* data){ void rf24_send(unsigned char* data){
rf24_tx(); rf24_tx();
digital_write(_csn, LOW);
rf24_serial_write(FLUSH_TX);
rf24_serial_write(W_TX_PAYLOAD); rf24_serial_write(W_TX_PAYLOAD);
rf24_serial_transmit(data, _payload_len); rf24_serial_transmit(data, _payload_len);
digital_write(_csn, HIGH);
digital_write(_ce, HIGH); digital_write(_ce, HIGH);
} }
@@ -121,6 +131,7 @@ unsigned char rf24_data_ready(){
} }
void rf24_get_data(unsigned char* data){ void rf24_get_data(unsigned char* data){
digital_write(_csn, LOW);
rf24_serial_write(R_RX_PAYLOAD); rf24_serial_write(R_RX_PAYLOAD);
unsigned char i = 0; unsigned char i = 0;
@@ -128,22 +139,31 @@ void rf24_get_data(unsigned char* data){
data[i] = rf24_serial_write(NOP); data[i] = rf24_serial_write(NOP);
} }
rf24_config_register(STATUS, 1<<RX_DR);
rf24_serial_write(FLUSH_RX); rf24_serial_write(FLUSH_RX);
digital_write(_csn, HIGH);
rf24_config_register(STATUS, 1<<RX_DR);
} }
unsigned char rf24_status(){ unsigned char rf24_status(){
return rf24_serial_write(NOP); // returns STATUS register digital_write(_csn, LOW);
unsigned char status = rf24_serial_write(NOP); // returns STATUS register
digital_write(_csn, HIGH);
return status;
} }
void rf24_config_register(unsigned char reg, unsigned char value){ void rf24_config_register(unsigned char reg, unsigned char value){
digital_write(_csn, LOW);
rf24_serial_write(W_REGISTER|(reg&REG_MASK)); rf24_serial_write(W_REGISTER|(reg&REG_MASK));
rf24_serial_write(value); rf24_serial_write(value);
digital_write(_csn, HIGH);
} }
unsigned char rf24_read_register(unsigned char reg){ unsigned char rf24_read_register(unsigned char reg){
digital_write(_csn, LOW);
rf24_serial_write(R_REGISTER|(reg&REG_MASK)); rf24_serial_write(R_REGISTER|(reg&REG_MASK));
return rf24_serial_write(NOP); unsigned char data = rf24_serial_write(NOP);
digital_write(_csn, HIGH);
return data;
} }
unsigned char rf24_fifo_empty(){ unsigned char rf24_fifo_empty(){
@@ -160,11 +180,13 @@ void rf24_serial_transmit(unsigned char* data, unsigned char len){
} }
unsigned char rf24_serial_write(unsigned char data){ unsigned char rf24_serial_write(unsigned char data){
digital_write(_csn, LOW); // chip enable digital_write(_sck, LOW); // clock
unsigned char i = 0, rx = 0; unsigned char i = 0, rx = 0;
_delay_ms(40); // FIXME remove
for(i = 0; i < 8; i++){ for(i = 0; i < 8; i++){
digital_write(_sck, LOW); // clock _delay_ms(5); // FIXME remove
// write bit // write bit
if(data&(1<<(7-i))){ if(data&(1<<(7-i))){
@@ -175,16 +197,17 @@ unsigned char rf24_serial_write(unsigned char data){
} }
// read bit // read bit
digital_write(_sck, HIGH); // clock digital_write(_sck, HIGH);
rx <<= 1; rx = rx<<1;
if(digital_read(_mi)){ if(digital_read(_mi)){
rx |= 0x01; rx |= 0x01;
} }
digital_write(_sck, LOW);
} }
digital_write(_sck, LOW); _delay_ms(5); // FIXME remove
digital_write(_csn, HIGH); // chip disable
digital_write(_mo, LOW); digital_write(_mo, LOW);
return rx; return rx;