diff --git a/compile b/compile index 4ab5a2e..760f95e 100755 --- a/compile +++ b/compile @@ -1,11 +1,17 @@ #!/bin/bash mkdir build + +avr-gcc -Os -DF_CPU=16000000UL -mmcu=atmega328p -c -o build/rf24.o -Wall rf24/rf24.c + avr-gcc -Os -DF_CPU=16000000UL -mmcu=atmega328p -c -o build/util.o -Wall ard/util.c avr-gcc -Os -DF_CPU=16000000UL -mmcu=atmega328p -c -o build/serial.o -Wall ard/serial.c avr-gcc -Os -DF_CPU=16000000UL -mmcu=atmega328p -c -o build/pins.o -Wall ard/pins.c + avr-gcc -Os -DF_CPU=16000000UL -mmcu=atmega328p -c -o build/main.o -Wall main.c + avr-gcc -mmcu=atmega328p build/*.o -o build/main avr-objcopy -O ihex -R .eeprom build/main build/main.hex avrdude -F -V -c arduino -p ATMEGA328P -P $1 -b 57600 -U flash:w:build/main.hex + rm -r build diff --git a/main.c b/main.c index 0616d88..de1d799 100644 --- a/main.c +++ b/main.c @@ -1,7 +1,9 @@ +#include #include #include "ard/serial.h" #include "ard/pins.h" #include "ard/util.h" +#include "rf24/rf24.h" void prepare(); void loop(); @@ -15,27 +17,16 @@ int main(){ } void prepare(){ - // enable global interrupts and serial port pins_init(); serial_init(9600); - - pin_mode(A1, INPUT); - pin_mode(6, OUTPUT); - pin_mode(11, OUTPUT); + pin_mode(2, OUTPUT); + digital_write(2, LOW); + rf24_init(32, 2, 8, 7, 6, 5, 4); + digital_write(2, HIGH); } void loop(){ - int analog = map(analog_read(A1), 0, 1023, 0, 255); - analog_write(11, analog); + - if(analog < 128){ - digital_write(6, HIGH); - } - else{ - digital_write(6, LOW); - } - - char out[15]; - sprintf(out, "%d", analog); - serial_write(out, 15); + _delay_ms(1000); } diff --git a/rf24/register.h b/rf24/register.h new file mode 100644 index 0000000..36243b6 --- /dev/null +++ b/rf24/register.h @@ -0,0 +1,93 @@ +// DO NOT INCLUDE THIS! +// INCLUDE rf24.h INSTEAD! + +#define CONFIG 0x00 +#define EN_AA 0x01 +#define EN_RXADDR 0x02 +#define SETUP_AW 0x03 +#define SETUP_RETR 0x04 +#define RF_CH 0x05 +#define RF_SETUP 0x06 +#define STATUS 0x07 +#define OBSERVE_TX 0x08 +#define CD 0x09 +#define RX_ADDR_P0 0x0A +#define RX_ADDR_P1 0x0B +#define RX_ADDR_P2 0x0C +#define RX_ADDR_P3 0x0D +#define RX_ADDR_P4 0x0E +#define RX_ADDR_P5 0x0F +#define TX_ADDR 0x10 +#define RX_PW_P0 0x11 +#define RX_PW_P1 0x12 +#define RX_PW_P2 0x13 +#define RX_PW_P3 0x14 +#define RX_PW_P4 0x15 +#define RX_PW_P5 0x16 +#define FIFO_STATUS 0x17 +#define DYNPD 0x1C + +#define MASK_RX_DR 6 +#define MASK_TX_DS 5 +#define MASK_MAX_RT 4 +#define EN_CRC 3 +#define CRCO 2 +#define PWR_UP 1 +#define PRIM_RX 0 + +#define ENAA_P5 5 +#define ENAA_P4 4 +#define ENAA_P3 3 +#define ENAA_P2 2 +#define ENAA_P1 1 +#define ENAA_P0 0 + +#define ERX_P5 5 +#define ERX_P4 4 +#define ERX_P3 3 +#define ERX_P2 2 +#define ERX_P1 1 +#define ERX_P0 0 + +#define AW 0 // 2 bits + +#define ARD 4 // 4 bits +#define ARC 0 // 4 bits + +#define PLL_LOCK 4 +#define RF_DR 3 +#define RF_PWR 1 // 2 bits + +#define RX_DR 6 +#define TX_DS 5 +#define MAX_RT 4 +#define RX_P_NO 1 // 3 bits +#define TX_FULL 0 + +#define PLOS_CNT 4 // 4 bits +#define ARC_CNT 0 // 4 bits + +#define TX_REUSE 6 +#define FIFO_FULL 5 +#define TX_EMPTY 4 +#define RX_FULL 1 +#define RX_EMPTY 0 + +#define DPL_P0 0 +#define DPL_P1 1 +#define DPL_P2 2 +#define DPL_P3 3 +#define DPL_P4 4 +#define DPL_P5 5 + +#define R_REGISTER 0x00 // last 4 bits will indicate reg. address +#define W_REGISTER 0x20 // last 4 bits will indicate reg. address +#define REGISTER_MASK 0x1F +#define R_RX_PAYLOAD 0x61 +#define W_TX_PAYLOAD 0xA0 +#define FLUSH_TX 0xE1 +#define FLUSH_RX 0xE2 +#define REUSE_TX_PL 0xE3 +#define ACTIVATE 0x50 +#define R_RX_PL_WID 0x60 +#define NOP 0xFF diff --git a/rf24/rf24.c b/rf24/rf24.c new file mode 100644 index 0000000..cf8e84a --- /dev/null +++ b/rf24/rf24.c @@ -0,0 +1,89 @@ +#include "rf24.h" +#include "../ard/pins.h" + +// CE = standby mode, CSN = SPI chip select +char payload_len, spi_ce, spi_csn, spi_sck, spi_mosi, spi_miso; + +void reg_write(unsigned char, unsigned char); +void spi_transfer(unsigned char); + +void rf24_init(unsigned char payload_length, + unsigned char channel, + unsigned char ce, + unsigned char csn, + unsigned char sck, + unsigned char mosi, + unsigned char miso){ + if(payload_length > 32){ + payload_length = 32; + } + + payload_len = payload_length; + spi_ce = ce; + spi_csn = csn; + spi_sck = sck; + spi_mosi = mosi; + spi_miso = miso; + + pin_mode(spi_ce, OUTPUT); + pin_mode(spi_csn, OUTPUT); + pin_mode(spi_sck, OUTPUT); + pin_mode(spi_mosi, OUTPUT); + pin_mode(spi_miso, INPUT); + + digital_write(spi_ce, LOW); + digital_write(spi_csn, HIGH); + + reg_write(RF_CH, channel); +} + +void rf24_tx_addr(unsigned char* addr){ + +} + +void rf24_rx_addr(unsigned char* addr){ + +} + +void rf24_send(char* data){ + +} + +void rf24_receive(char* data){ + +} + +void reg_write(unsigned char reg, unsigned char value){ + digital_write(spi_csn, LOW); + spi_transfer(W_REGISTER|(REGISTER_MASK®)); + spi_transfer(value); + digital_write(spi_csn, HIGH); +} + +void spi_transfer(unsigned char data){ + unsigned char i = 0; + unsigned char rx = 0; + + digital_write(spi_sck, LOW); // clock + + for(i = 0; i < 8; i++){ + // tx + if(data&(1<<(7-i))){ + digital_write(spi_mosi, HIGH); + } + else{ + digital_write(spi_mosi, LOW); + } + + digital_write(spi_sck, HIGH); // clock + + // rx + rx <<= 1; + + if(digital_read(spi_miso) == HIGH){ + rx |= 0x01; + } + + digital_write(spi_sck, LOW); // clock + } +} diff --git a/rf24/rf24.h b/rf24/rf24.h new file mode 100644 index 0000000..d8df0cb --- /dev/null +++ b/rf24/rf24.h @@ -0,0 +1,12 @@ +#ifndef RF24_H_ +#define RF24_H_ + +#include "register.h" + +void rf24_init(unsigned char, unsigned char, unsigned char, unsigned char, unsigned char, unsigned char, unsigned char); +void rf24_tx_addr(unsigned char*); +void rf24_rx_addr(unsigned char*); +void rf24_send(char*); // length is fixed and set on initialization +void rf24_receive(char*); // length is fixed and set on initialization + +#endif