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Chip config.

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This commit is contained in:
Marvin Blum
2017-04-16 13:46:18 +02:00
parent 81479a9ea0
commit f5769d48c9
5 changed files with 201 additions and 28 deletions
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134
rf24/nRF24L01.h
View File

@@ -1,25 +1,125 @@
#ifndef NRF24L01_H_
#define NRF24L01_H_
#define CONFIG 0x00
#define MASK_RX_DR 6
#define MASK_TX_DS 5
#define MASK_MAX_RT 4
#define EN_CRC 3
#define CRCO 2
#define PWR_UP 1
#define PRIM_RX 0
#define CONFIG 0x00
#define MASK_RX_DR 6
#define MASK_TX_DS 5
#define MASK_MAX_RT 4
#define EN_CRC 3
#define CRCO 2
#define PWR_UP 1
#define PRIM_RX 0
#define STATUS 0x07
#define RX_DR 6
#define TX_DS 5
#define MAX_RT 4
#define RX_P_NO 3 // 3 bits
#define TX_FULL 0
#define EN_AA 0x01
#define ENAA_P5 5
#define ENAA_P4 4
#define ENAA_P3 3
#define ENAA_P2 2
#define ENAA_P1 1
#define ENAA_P0 0
#define R_REGISTER 0x00
#define W_REGISTER 0x20
#define REG_MASK 0x1f
#define EN_RXADDR 0x02
#define ERX_P5 5
#define ERX_P4 4
#define ERX_P3 3
#define ERX_P2 2
#define ERX_P1 1
#define ERX_P0 0
#define SETUP_AW 0x03
#define AW 0 // 2 bits
#define SETUP_RETR 0x04
#define ARD 4 // 4 bits
#define ARC 0 // 4 bits
#define RF_CH_REG 0x05
#define RF_CH 0 // 7 bits
#define RF_CH_MASK 0x7F
#define RF_SETUP 0x06
#define CONT_WAVE 7
#define RF_DR_LOW 5
#define PLL_LOCK 4
#define RF_DR_HIGH 3
#define RF_PWR 0 // 2 bits
#define STATUS 0x07
#define RX_DR 6
#define TX_DS 5
#define MAX_RT 4
#define RX_P_NO 1 // 3 bits
#define STATUS_TX_FULL 0
#define OBSERVE_TX 0x08
#define PLOS_CNT 4 // 4 bits
#define ARC_CNT 0 // 4 bits
#define RPD_REG 0x09
#define RPD 0
#define RX_ADDR_P0 0x0A // 5 bytes
#define RX_ADDR_P1 0x0B // 5 bytes
#define RX_ADDR_P2 0x0C // 1 byte
#define RX_ADDR_P3 0x0D // 1 byte
#define RX_ADDR_P4 0x0E // 1 byte
#define RX_ADDR_P5 0x0F // 1 byte
#define TX_ADDR 0x10 // 5 bytes
#define RX_PW_P0_REG 0x11
#define RX_PW_P0 0 // 6 bits
#define RX_PW_P1_REG 0x12
#define RX_PW_P1 0 // 6 bits
#define RX_PW_P2_REG 0x13
#define RX_PW_P2 0 // 6 bits
#define RX_PW_P3_REG 0x14
#define RX_PW_P3 0 // 6 bits
#define RX_PW_P4_REG 0x15
#define RX_PW_P4 0 // 6 bits
#define RX_PW_P5_REG 0x16
#define RX_PW_P5 0 // 6 bits
#define RX_PW_MASK 0x3F
#define FIFO_STATUS 0x17
#define TX_REUSE 6
#define TX_FULL 5
#define TX_EMPTY 4
#define RX_FULL 1
#define RX_EMPTY 0
#define DYNPD 0x1C
#define DPL_P5 5
#define DPL_P4 4
#define DPL_P3 3
#define DPL_P2 2
#define DPL_P1 1
#define DPL_P0 0
#define FEATURE 0x1D
#define EN_DPL 2
#define EN_ACK_PAY 1
#define EN_DYN_ACK 0
#define R_REGISTER 0x00
#define W_REGISTER 0x20
#define REG_MASK 0x1F
#define R_RX_PAYLOAD 0x61
#define W_TX_PAYLOAD 0xA0
#define FLUSH_TX 0xE1
#define FLUSH_RX 0xE2
#define REUSE_TX_PL 0xE3
#define R_RX_PL_WID 0x60
#define W_ACK_PAYLOAD 0xA8
#define W_ACK_PAYLOAD_MASK 0x07
#define PIPE_0 0x00
#define PIPE_1 0x01
#define PIPE_2 0x02
#define PIPE_3 0x03
#define PIPE_4 0x04
#define PIPE_5 0x05
#define W_TX_PAYLOAD_NOACK 0xB0
#define NOP 0xFF
// TODO

72
rf24/rf24.c
View File

@@ -11,12 +11,14 @@ const unsigned char RF24_STANDBY_2 = 3;
const unsigned char RF24_TX = 4;
const unsigned char RF24_RX = 5;
unsigned char _ce, _csn, _sck, _mo, _mi, _irq;
unsigned char _ce, _csn, _sck, _mo, _mi, _irq, _payload_len;
void rf24_serial_transmit(unsigned char*, unsigned char);
unsigned char rf24_serial_write(unsigned char);
void rf24_init(unsigned char ce, unsigned char csn, unsigned char sck, unsigned char mo, unsigned char mi, unsigned char irq){
pin_mode(ce, OUTPUT);
digital_write(ce, LOW); // disable
pin_mode(csn, OUTPUT);
digital_write(csn, HIGH); // disable
pin_mode(sck, OUTPUT);
@@ -31,25 +33,74 @@ void rf24_init(unsigned char ce, unsigned char csn, unsigned char sck, unsigned
_mi = mi;
_irq = irq;
rf24_mode(RF24_POWER_DOWN);
//rf24_mode(RF24_POWER_DOWN);
}
void rf24_mode(unsigned char mode){
// channel in 1Mhz steps
void rf24_config(unsigned char channel, unsigned char payload_len){
_payload_len = payload_len;
rf24_config_register(RF_CH, channel&RF_CH_MASK); // 2.4Ghz + channel*1Mhz
rf24_config_register(RX_PW_P0, 0x00); // auto ACK
rf24_config_register(RX_PW_P1, payload_len&RX_PW_MASK); // data
rf24_config_register(RX_PW_P2, 0x00); // unused...
rf24_config_register(RX_PW_P3, 0x00);
rf24_config_register(RX_PW_P4, 0x00);
rf24_config_register(RX_PW_P5, 0x00);
// low transmission rate, 0dBm
rf24_config_register(RF_SETUP, (1<<RF_DR_LOW)|(0x03<<RF_PWR));
// CRC
rf24_config_register(CONFIG, (1<<EN_CRC)|(1<<CRCO));
// auto ACK for pipe 0 and 1
//rf24_config_register(EN_AA, 0x03);
// rx address
//rf24_config_register(EN_RXADDR, (1<<ERX_P0)|(1<<ERX_P1));
// auto retransmit, 1000us, 15 retransmits
rf24_config_register(SETUP_RETR, (0x03<<ARD)|(0x0F<<ARC));
}
void rf24_rx_addr(unsigned char* addr){
rf24_serial_write(W_REGISTER|RX_ADDR_P1); // data pipe
rf24_serial_transmit(addr, 5);
}
void rf24_tx_addr(unsigned char* addr){
rf24_serial_write(W_REGISTER|RX_ADDR_P0); // auto ACK pipe address must match...
rf24_serial_transmit(addr, 5);
rf24_serial_write(W_REGISTER|TX_ADDR); // tx address
rf24_serial_transmit(addr, 5);
}
/*void rf24_mode(unsigned char mode){
switch(mode){
case 1: // RF24_POWER_DOWN
digital_write(_ce, LOW);
rf24_config_register(CONFIG, 0x00);
break;
case 2: // RF24_STANDBY_1
//rf24_config_register(CONFIG, 1<<PWR_UP);
digital_write(_ce, LOW);
rf24_config_register(CONFIG, 1<<PWR_UP);
break;
case 3: // RF24_STANDBY_2
digital_write(_ce, HIGH);
rf24_config_register(CONFIG, 1<<PWR_UP);
break;
case 4: // RF24_TX
digital_write(_ce, HIGH);
rf24_config_register(CONFIG, 1<<PWR_UP);
break;
case 5: // RF24_RX
digital_write(_ce, HIGH);
rf24_config_register(CONFIG, (1<<PWR_UP)|(1<<PRIM_RX));
break;
}
}
}*/
void rf24_config_register(unsigned char reg, unsigned char value){
rf24_serial_write(W_REGISTER|(reg&REG_MASK));
@@ -60,12 +111,22 @@ unsigned char rf24_read_register(unsigned char reg){
return rf24_serial_write(R_REGISTER|(reg&REG_MASK));
}
void rf24_serial_transmit(unsigned char* data, unsigned char len){
unsigned char i = 0;
for(i = 0; i < len; i++){
rf24_serial_write(data[(len-1-i)]);
}
}
unsigned char rf24_serial_write(unsigned char data){
digital_write(_sck, LOW);
digital_write(_csn, LOW); // chip enable
unsigned char i = 0, rx = 0;
for(i = 0; i < 8; i++){
_delay_ms(5);
// write bit
if(data&(1<<(7-i))){
digital_write(_mo, HIGH);
@@ -86,6 +147,7 @@ unsigned char rf24_serial_write(unsigned char data){
}
digital_write(_csn, HIGH); // chip disable
digital_write(_mo, LOW);
return rx;
}

5
rf24/rf24.h
View File

@@ -8,7 +8,10 @@ extern const unsigned char RF24_TX;
extern const unsigned char RF24_RX;
void rf24_init(unsigned char, unsigned char, unsigned char, unsigned char, unsigned char, unsigned char);
void rf24_mode(unsigned char);
void rf24_config(unsigned char, unsigned char);
void rf24_rx_addr(unsigned char*);
void rf24_tx_addr(unsigned char*);
//void rf24_mode(unsigned char);
void rf24_config_register(unsigned char, unsigned char);
unsigned char rf24_read_register(unsigned char);